The ring counter (shift register sequencer) is a unique type of shift register that incorporates feedback from the output of the last flip-flop to the input of the first flip-flop. Figure 12.119 shows a 4-bit ring counter made from D-type flip-flops. In this circuit, when the START' input is set low, Q0 is forced high by the active-low preset, while Q1, Q2, and Q3 are forced low (cleared) by the active-low clear. This causes the binary word 1000 to be stored within the register. When the START line is brought low, the data bits stored in the flip-flops are shifted right with each positive clock edge. The data bit from the last flip-flop is sent to the D input of the first flip-flop. The shifting cycle will continue to recirculate while the clock is applied. To start fresh cycle, the START line is momentarily brought low.

THIS APPLICATION CAN USE AS LAMP DECORATION OR ADVERTISER. YOU CAN MAKE MORE OUTPUT BY THOSE CONNECTION USE MORE D-FLIP FLOP

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